1. Field of the Invention
The present invention relates to a C-MOS thin film transistor device and a method for manufacturing the C-MOS thin film transistor device.
2. Description of the Related Art
In a general monocrystal wafer process, a C-MOS transistor is approximately manufactured in accordance with the following processing sequence.
(1) formation of a p-well using a wafer n(100) about 2 .OMEGA. cm PA0 (2) growths of a PAD oxide film and a Si.sub.3 N.sub.4 film PA0 (3) active photo-litho PA0 (4) p-channel photo-litho PA0 (5) implantation of a boron ion PA0 (6) field oxidation PA0 (7) growth of a gate oxide film PA0 (8) Vth control photo-litho PA0 (9) implantation of a boron ion PA0 (10) growth of polysilicon PA0 (11) diffusion of phosphorus (gate diffusion) PA0 (12) patterning of polysilicon PA0 (13) n.sup.+ diffusion photo-litho PA0 (14) implantation of an arsenic ion: 1.times.10.sup.16 cm.sup.-2 PA0 (15) drive-in PA0 (16) p.sup.+ diffusion photo-litho PA0 (17) implantation of a boron ion: 1.times.10.sup.15 cm.sup.-2 PA0 (18) growth of a PSG film PA0 (19) annealing PA0 (20) contact photo-litho PA0 (21) formation of aluminum wiring PA0 (22) sintering PA0 (23) formation of a passivation film
where the above processes (13) to (19) are set to form a source-drain region,
and
As can be seen from the above processing sequence, a process for reducing the resistance of a gate electrode and a processing for forming the source-drain region are different from each other.
In an n-channel transistor, impurities of p- and n-types are implanted into the source-drain section so that it is necessary to set the concentration of the n-type impurity to be higher than that of the p-type impurity. Further, there is a problem that the resistance of the source-drain section is high.